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Paul Beazley

  • FPGA/ASIC Design Engineer for Boeing Space Electronics
  • El Segundo, California, United States
  • Defense & Space

Education

Texas A&M University, Master’s degree, Computer Engineering

Background

Experience

  • SoC and FPGA Design Engineer

    Boeing

    February 2015 – Present(4 years 8 months)El Segundo, California

    SoC and FPGA design engineer with several years of experience working in a large department dedicated to advanced ASIC and FPGA development for Boeing Space Electronics.

Education

  • Texas A&M University

    Master’s degree, Computer Engineering

    2013 – 2014

    Computer Architecture ASIC Development

  • Texas A&M University

    Bachelor of Science (BS), Electrical Engineering

    2009 – 2013

    Telecommunications and Signal Processing Minor in Mathematics

Skills & Expertise

  • Static Timing Analysis
  • MIPS
  • Synplify Pro
  • Matlab
  • Circuit Design
  • XML
  • Perl
  • UART
  • QuestaSim
  • Clock Domain Crossing (CDC) Analysis
  • Verilog
  • I2C
  • Unix
  • Python
  • JESD204B
  • PCIe
  • Linux
  • VHDL
  • VLSI
  • Network on a Chip (NoC)
  • SoC Design
  • FPGA
  • C
  • SystemVerilog
  • C++
  • Shell Scripting
  • NI Labview
  • Java
  • AXI4
  • Space Systems
  • NCSim
  • UVM (Beginner)