Atul Vekaria

  • Experience Embedded Hardware/software design engineer.
  • Buena Park, California, United States
  • Computer Hardware

Previous positions

  • Electronic Engineer at Valhalla Scientific
  • Electronic Engineer at Electronic Manufacturing Technology Inc


New York University, Master’s degree, Computer Engineering



• Build smart device with BLE connectivity using TI CC2650 • Wrote RTOS kernel with 7 preemptive and 4 Non-preemptive task for 2K flash processor • Using TI TM4C123 and CC3100 implemented web connectivity for any device. • Wrote device driver for various communication standards such as I2C, SPI, CAN, UART,USB • Proficiency in “bare metal”, RTOS and Linux-based C development • Experience with High speed PCB design for FPGA


  • Firmware Engineer

    Universal Electronics

    December 2017 – Present(1 year 10 months)Santa Ana

    Firmware development for BLE stack 4.2 and 5.0 on SOC universal electronics UE878 cortex M4 processor. Developing Custom GATT profile for Google O voice supported RCU for Android TV. Developing self programming RCU and proprietary voice solution for linux based STB

  • Electronic Engineer

    Valhalla Scientific

    August 2013 – November 2017(4 years 3 months)San Diego, California

    Build smart fitness device using TI CC2650 BLE module to interact with smartphone. • Programmed various microcontroller in embedded C for high precision device with minimal calibration and maintenance overhead. • Written device driver for various communication standards such as I2C, SPI, CAN, USB for ARM/PIC/Atmel processor • Wrote RTOS kernel for TI MSP430 with 7 preemptive and 3 non-preemptive tasks • Implemented simple web access device using TI TM4C123 and CC3100 launch pad over WI-FI • Designed high speed PCB for Xilinx/Altera FPGA • Automated testing for remote system using Python. • Integrated first article assembly into test systems to perform system level debug and performance verification of electronic testing product like voltmeter, micro ohm meter • Written device manual, calibration, testing and troubleshooting procedure for electronic devices used for Aerospace, Military and Automobile Industries

  • Electronic Engineer

    Electronic Manufacturing Technology Inc

    January 2009 – July 2013(4 years 6 months)San Diego

    • Key contributor in designing and developing for manufacturing process for medical, Aerospace and other consumer electronic product and bring-up procedure for same • Wrote test and troubleshoot procedure which leads to reduce system downtime by 20% • Coordinate with inspection teams in areas of board assembly and testing to reach 97% yield in 3 months • Responsible for developing and testing new control panel systems as well as maintaining / upgrading existing systems

  • Process Engineer (Front End)

    PCB Planet

    June 2006 – December 2008(2 years 6 months)Gandhinagar, Gujarat, India

    • Assist circuit design engineer in designing analog and digital circuits, circuit boards and other electrical hardware. • In-charge of documentation of the detailed design based on microprocessor, microcontroller, etc.


  • New York University

    Master’s degree, Computer Engineering

    2013 – 2016

  • Shivaji University

    Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering

    2002 – 2006


  • English

    Full professional proficiency

  • Hindi

    Native or bilingual proficiency

  • Gujarati

    Native or bilingual proficiency


  • Design 2D asteroid game in Python

    Team Members (1):
    • Atul Vekaria
  • Single cycle 16-bit CPU Implementation (Verilog)

    September 2015

    Designed 16-bit CPU supports 30 single and double word instructions in 5 categories are load, store, branch, ALU, shift. Implemented with parameterized module that allow for future development.

    Team Members (1):
    • Atul Vekaria
  • MIPS 32-bit CPU architecture Modification (VHDL)

    September 2014

    Modified MIPS 32-bit CPU to accommodate indexed and auto Inc / Dec-addressing mode. Altera Signal Tap-II is used to debug on chip CPU functionality.

    Team Members (1):
    • Atul Vekaria
  • AES -256 block cipher as per NIST FIPS 197 standard (VHDL)

    January 2014

    Implemented symmetric AES Cipher on Altera FPGA and tested for power usage and timing constrains. Also using JTEG scan chain performed on chip debug. Reduce power usage by 20% using on chip modules.

    Team Members (1):
    • Atul Vekaria
  • RC5 encryption and decryption protocol (VHDL)

    September 2013

    Implemented RC5 protocol to get understanding of all aspect of FPGA implementation from design specification to final product includes 1) Design specification 2) HDL capture 3) RTL simulation 4)RTL synthesis 5) Place and Route 6) Post layout timing simulation 7) Static Timing 8) On chip debug.

    Team Members (1):
    • Atul Vekaria

Skills & Expertise

  • Engineering
  • Analog
  • PCB Design
  • Labview
  • Manufacturing
  • Embedded C
  • Python
  • Digital Electronics
  • Linux
  • VHDL
  • Troubleshooting
  • Microcontrollers
  • C
  • Debugging
  • C++
  • Failure Analysis
  • Testing
  • Assembly Language


  • edX Verified Certificate for Embedded Systems – Shape the World

    edX, License