- Graduate Research Assistant at Virginia Tech
- Graduate Teaching Assistant at Virginia Tech
Virginia Polytechnic Institute and State University, Master of Science (MS), Computer Engineering
Designing and developing 3GPP Layer 2 protocol software for Qualcomm 5G modem chipsets including Radio Link Control and Packet Data Convergence Protocol.
Present a generic spatio-temporal regression analysis to predict traffic volume, crime volume and electric vehicle charging demand by mining urban datasets and using supervised machine learning algorithms
• Designing assignments on Raspberry Pi involving socket programming, Bluetooth, RabbitMQ, noSQL database, REST APIs using Python • Giving lectures and helping students with assignments
• Developed kernel-level device driver (for Windows and Linux) using C++ in a multi-threaded environment for DMA memory communication between controller and FPGA • Performed tests using scripts written in Python
• Lab assistant for Computer Engineering Lab at Virginia Tech • Grading 100 undergraduate students assignments for ECE2504-Introduction to Computer Engineering • Helping undergraduate students with assignments and projects based on digital circuits on DE0 Nano Board using Altera Quartus simulation and Verilog
• AUTOSAR & ISO 26262 complaint production mode software development for the Body Control Module ECUs in automobiles • Development of device drivers like UART and SPI for Renesas RH850 and Infineon Aurix platforms. • Requirement engineering: Maintaining technical description and requirement specifications as per Software Process Improvement and Capability Determination (SPICE) level • Mentoring new team members on AUTOSAR, communication standards and Embedded C Language
August 2011 – May 2013(1 year 9 months)Raipur Area, India
• Organized national level technical festival – Aavartan 2012 and 2013 • Handled editorial related tasks like preparing brochures, articles and proof reading • Organized technical events, workshops and seminars in college
Realized hardware model for 163 bit Elliptical Curve Cryptography core that can be used as a co-processor.
Master of Science (MS), Computer Engineering
2015 – 2017
Activities and Societies
First prize in Graduate School Art and Photography competition for my photograph in Fall 2015
B.Tech, Electronics & Telecommunication
2009 – 2013
1. Graduated with Honors (Silver Medal) in Bachelor of Technology, Electronics and Telecommunication Engineering, for Class of 2013. 2. Led annual national level technical festival – Aavartan for the year 2012 and 2013.
Activities and Societies
TechnoCracy (Technical Committee), ASSETS (ASSociation of Electronics and Telecommunication Students)
Swami Vivekananda Higher Secondary School
Higher Secondary School Certificate Examination, Science (Physics/Chemistry/Mathematics)
2008 – 2009
Bharat Mata Higher Secondary School
High School Certificate Examination, Mathematics and Science
1995 – 2008
Full professional proficiency
Native or bilingual proficiency
A software based approach toward early maturity of complex automotive hardware and test equipments
IEEE International Conference on Industrial Instrumentation and Control (ICIC 2015)
During an automotive embedded product development, hardware and software are developed concurrently. In order to test a complete electronic board, software is necessary. Very often mature functional software is not available during A-sample hardware level. So, electronic board testing has to wait until basic software is available. Similarly, for initiation of hardware-in-the-loop test set-ups, an electronic board and software is required. These test benches cannot be tested completely as functional software may not available during initial phase of the project. This paper presents a technique, which helps in validation of the electronic board and test setups. It facilitates early sample maturity; and hence, reduces time and cost spent due to rework.
Characterizing and prediction crime in the city of Chicago
Analyzing spatial-temporal information to predict crime in the city of Chicago using historical crime data using supervised learning techniques like decision tree classifier and support vector machine, random forest classifier and logistic regression
Team Members (2):
ATPG based Binary Decision Diagram Variable Ordering
April 2016 – May 2016
Implemented a variable ordering technique for Binary Decision Diagrams (BDD) using PODEM based Automatic Test Pattern Generation technique using C++ as final project for ECE5534: Electronic Design Automation. It involved using standard C++ libraries like hash tables, maps and vectors for representing graphs and graph manipulation.
Team Members (1):
Implementing Synchronous Reactive Models for Real-Time Multicore Applications
October 2015 – March 2016
Synchronous Reactive model is one of the models of computation used in many commercial tools like MATLAB Simulink. However, there are many semantics and concurrency issues in modeling a multicore system. Wait-free mechanism is an efficient way of avoiding data consistency and obtaining flow preservation using rate transition blocks. The project investigate the effect of efficient addition of rate transition block of delay block type on a multicore system and its effect on performance and memory. It used Integer Linear Programming approach to mathematically present and solve the scheduling and delay block placement problem. IBM ILOG CPLEX Optimization Studio was used as a ILP solver, using Optimization Programming Language (OPL) for ILP formulation and implementation.
Team Members (1):
Software and Hardware Realization of Advanced Hill Cipher Algorithm
July 2012 – May 2013
The project involved implementing Advanced Hill Cipher Algorithm, which is a two level Hill Cipher algorithm, for image encryption and decryption. An image matrix is multiplied with an involuntary key matrix for cryptography operations and undergoes transpose to make it secure against statistical attacks. The software application used MATLAB for realization. For hardware realization of the algorithm, digital design was emulated in Xilinx FPGA Spartan 3AN and was designed using Verilog HDL.
Team Members (3):
Silicon core realization for Elliptical Curve Cryptography Algorithm
May 2012 – July 2012
A hardware model for 163 bit Elliptical Curve Cryptography was realized using Verilog HDL in this project. The design involves performing finite field calculations including field addition, multiplication and inversion on a non-singular elliptical curve. The design involves parallel processing and hardware re-usability and can be used as a co-processor. The design also had AXI bus support for convenient hardware-software interfacing. With Xilinx ISE as working environment, the design was emulated and tested on Xilinx FPGA Virtex-6 ML605.
Team Members (2):
Skills & Expertise
- Automotive Electronics
- Device Drivers
- Data Analysis
- Embedded C
- Artificial Neural Networks
- Microsoft Office
- Field-Programmable Gate Arrays (FPGA)
- Machine Learning
- Embedded Systems
Coursera Course Certificates, License SH8CSJX3XQD5
Programming for Everybody (Python)
Coursera Verified Certificates, License UDV9UB5A52
Neural Networks and Deep Learning
Coursera, License SBTT379DSKFX
Improving Deep Neural Networks: Hyperparameter tuning, Regularization and Optimization
Coursera, License LBEU5GH6UYAU
Structuring Machine Learning Projects
Coursera, License 4FDLX5PBR9EM
Convolutional Neural Networks
Coursera, License YHPF7AKTD8F8
Coursera, License 2G7E4VTZ4QKB
Deep Learning Specialization
Coursera, License SR5JNX73WGPW
Virginia Polytechnic Institute and State University
- Urban Computing(CS5984)
- Cyber Physical Systems(ECE5984)
- Object Oriented Programming(ECE5575)
- Network Architecture and Protocols(ECE5565)
- Electronic Design Automation(ECE5534)
- Programming Languages(CS5314)
- Data Analytics I(CS5525)
National Institute of Technology Raipur
- Microcontroller and Embedded Systems(328713)
- Advanced Microprocessor & Interfacing(328613)
- Innovative & Entrepreneurial Skills(300725)
Honors & Awards
Pat On The Back
Received recognition award for implementing generic and optimized software to reduce cost and efforts in future software development of production mode in automotive Electronic Control Units.
National Institute of Technology, Raipur
Secured 2nd position in Bachelor of Technology, Electronics & Telecommunication Engineering for the batch 2009 – 2013.
Chhattisgarh State Board of Secondary Education
Secured 8th position in the Merit List in the Higher Secondary School Certificate Examination (Class 10+2) conducted by the Chhattisgarh State Board of Secondary Education for the year 2009. Rewarded by the former Governor of Chhattisgarh, Mr. Shekhar Dutt and Chief Minister of Chhattisgarh, Dr. Raman Singh.
General Proficiency Award
Bharat Mata Higher Secondary School
Received General Proficiency Award for excellent academic performance for the year 2006 and 2008.
Received 4 appreciation awards in less than one year at work.
November 2014 – November 2015
Volunteer Experience & Causes
June 2016Science and Technology
Volunteered to teach robotics to middle school students in a workshop organized by Breakthrough Austin and Science In a Suitcase while I was an intern at National Instruments in Summer 2016. We used a simplified and a kid-friendly graphical version of LabVIEW to program LEGO robots.
Causes Prakriti cares about:
- Science and Technology